Jane Street · London, England, United Kingdom
Hardware Engineer (FPGA/ASIC)
最近核查時仍有刊登最近確認刊登：2026-11-05 18:37:35.57261+00
招聘狀態可能變動，申請前請查看原始職位。
薪酬未公開
學歷未说明
語言英语 · 未指定等级
經驗未说明
來源發布日期：2026-08-03T04:37:45-04:00
查看招聘來源的要求摘錄
原始資料於 2026-11-04T13:50:42.608293+00:00 查閱；內容可能已更新，請查看原始職位。
About You We don't expect you to have a background in finance, OCaml, functional programming, or any other specific field— we're looking for smart people who enjoy solving interesting problems. We're more interested in how you think and learn than what you currently know. You should be: Comfortable with a software programming language Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project Interested in learning how to use FPGAs or ASICs in the context of networking Fluent in English
來源：公司官网 · 資料查閱日期 2026-11-04T13:50:42.608293+00:00。職位狀態及要求請以原始招聘頁面為準。