Jane Street · London, England, United Kingdom
ASIC Physical Design Engineer
最近核查時仍有刊登最近確認刊登：2026-11-05 18:37:35.57261+00
招聘狀態可能變動，申請前請查看原始職位。
薪酬未公開
學歷未说明
語言英语 · 未指定等级
經驗You have 8+ years hands-on experience building and running modern physical design flows (e.g., floorplanning, place and route, timing closure, physical verification, power analysis)
來源發布日期：2026-04-17T11:25:23-04:00
查看招聘來源的要求摘錄
原始資料於 2026-11-04T13:50:42.608293+00:00 查閱；內容可能已更新，請查看原始職位。
About you You have 8+ years hands-on experience building and running modern physical design flows (e.g., floorplanning, place and route, timing closure, physical verification, power analysis) You don't need to have optimised every last detail of every flow, but you should have broad enough experience across PD that you can own a flow end-to-end and know where the risks are Beyond PD, you can read and write RTL and understand how front-end design decisions affect physical implementation—and vice versa; You think about physical design in the context of the overall chip, not just as a downstream consumer of a netlist You're interested in using software engineering techniques to improve the hardware design process, and you have experience programming in a high-level language (Python, C++, Haskell, etc.) Fluent in English If you're a recruiting agency and want to partner with us, please reach out to [email protected].
來源：公司官网 · 資料查閱日期 2026-11-04T13:50:42.608293+00:00。職位狀態及要求請以原始招聘頁面為準。